![]() ![]() The SSE2 also complements the floating-point vector operations of the SSE instruction set by adding support for the double precision data type. Another advantage of replacing MMX with SSE2 is avoiding the mode switching penalty for issuing x87 instructions present in MMX because it is sharing register space with the x87 FPU. Instead of the MMX registers they use the XMM registers, which are wider and allow for significant performance improvements in specialized applications. Most of the SSE2 instructions implement the integer vector operations also found in MMX. Competing chip-maker AMD added support for SSE2 with the introduction of their Opteron and Athlon 64 ranges of AMD64 64-bit CPUs in 2003. ![]() SSE2 added 144 new instructions to SSE, which has 70 instructions. Intel extended SSE2 to create SSE3 in 2004. It extends the earlier SSE instruction set, and is intended to fully replace MMX. SSE2 ( Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. ( Learn how and when to remove this template message) ( April 2023) ( Learn how and when to remove this template message) Please help improve the article by providing more context for the reader. This article provides insufficient context for those unfamiliar with the subject.
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